Flash memory is a non-volatile memory component, widely used in modern electronic systems. The growing demand for high performance computing along with high capacity data storage stimulates flash technology development. The increase in capacity, often accompanied by performance reduction (due to the use of multiple charge levels), makes increasing performance a critical task. Current methods used to accelerate flash memory performance induce errors in the data. The technique presented uses a novel algorithm to exploit the actual capabilities of each part of the memory chip at any given time, thereby performing significantly accelerated read, write and erase operations without inducing undetected errors. Yet, implementation of the technique requires no changes in the core technology or fabrication process.